The flagship of the WaferEtch platform, the TSV Revealer, is specifically configured to address the process of wafer thinning to reveal the interconnects. This has become a critical step in the manufacture of 2.5D and 3D-IC packaging for process control and cost reduction. The TSV Revealer replaces four tools required for the dry-etch approach: CMP, plasma etch, silicon thickness measurement, and wafer cleaning. Integration of a thickness measurement sensor in the etch system provides closed-loop control of the wafer etching process. The TSV Revealer achieves a significant reduction in CoO, making 3D TSVs more economically feasible.
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